Computer Engineering Study Materials

8051 MICROCONTROLLER: TIMER INTERRUPT SERIAL COMMUNICATION

P0 (Port 0, Address 80h, Bit-Addressable) SP (Stack Pointer, Address 81h) DPL/DPH (Data Pointer Low/High, Addresses 82h/83h) PCON (Power Control, Addresses 87h) TCON (Timer Control, Addresses 88h, Bit-Addressable) T2CON TMOD (Timer Mode, Addresses 89h) TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch) TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh) P1 (Port 1, Address 90h, Bit-Addressable) SCON (Serial Control, Addresses 98h, Bit-Addressable) SBUF (Serial Control, Addresses 99h) P2 (Port 2, Address...

Software Engineering, 8th edition. Chapter 6 Software Requirement

Functional and non­functional requirements User requirements System requirements Interface specification  The software requirements document

Software Development Life Cycle by Dr Mrs M.A. Ajiboye

SDLC Model Waterfall Model V-Shaped Model Prototyping Rapid Application Development Spiral Model Conclusion

CPE 323 SOFTWARE DESIGN PRINCIPLES

Software engineering design, Carlos Otero, Chapter 1 (Software Design Fundamentals) GENERAL DESIGN PRINCIPLES 1. Modularization 2. Abstraction 3. Encapsulation 4. Coupling 5. Cohesion 6. Separation of interface and implementation 7. Sufficiency 8. Completeness

CPE 325 COMPUTER ARCHITECTURE (I)

• Introduction to Computer Architecture • Design and Performance issues of computers • Design alternative for arithmetic functions • CPU internal architecture, I/O interface and memory • Instruction set, Instruction cycle • I/O interrupt, Direct Memory Access • Bus and Memory Hierarchy • CAD tools for schematic capture and simulations

CPE 325: Computer Architecture I

I: CPU Internal Architecture Introduction Place of CPU in Computer Organization Functional elements of the CPU ALU Registers Internal & External data paths Control unit CPU ARCHITECTURE II: I/O Interface & Memory Problems in interfacing I/O devices with the CPU I/O Module Generic Model of I/O Module Peripherals Block diagram of a peripheral Interface with the I/O module Functions of the I/O Module Steps Involved in I/O, CPU and I/O module Interface

CPE 325 INPUT/OUTPUT TECHNIQUES by Mr. Nuhu Bello K.

Programmed I/O Interrupt driven I/O Direct Memory Access (DMA)

Control Systems-ACE-EC- By Easy Engineering.net

Introduction Open Loop and Closed Loop, Principles of Feedback, Transfer Function Block Diagrams and Signal Flow Graphs Time Domain Analysis: Transient and Steady State Response  Stability: RH-Criterion, Root Locus Technique Frequency Response Analysis: Bode Plot, Polar Plot, Nyquist Plot, M and N Circles, Nichol's Chart Compensators and Controllers: Lead, Lag and PID State Variable Analysis: STM, Controllability& Observability

Digital Fundamentals Tenth Edition Chapter 2

Decimal Numbers Binary Numbers Binary Conversions Binary Addition Binary Subtraction 1’s Complement 2’s Complement Signed Binary Numbers Floating Point Numbers Arithmetic Operations with Signed Numbers Hexadecimal Numbers Octal Numbers Binary Coded Decimal (BCD) Gray code ASCII Parity Method Cyclic Redundancy Check

Digital Fundamentals Tenth Edition Chapter 1

Analog Quantities Analog and Digital Systems Binary Digits and Logic Levels Digital Waveforms Pulse Definitions Periodic Pulse Waveforms Timing Diagrams Serial and Parallel Data Basic Logic Functions Basic System Functions Integrated Circuits Test and Measurement Instruments Programmable Logic

Understanding the Discrete Fourier Transform

Spot correlation Discrete spot correlation Fourier series Fourier series to transform Discrete Fourier Transform

Source Transformation Basis for Thevenin and Norton Equivalent Circuits

Voltage Sources Limitations of Real Voltage Source Current Sources Limitations of Real Current Source Electronic Response Equivalence Equivalent Circuits

SHIELDING

SHIELDING Shielding Against Capacitive Coupling Shielding Against Inductive Coupling The Coaxial Cable The Twisted Pair RF Shielding THE ELECTROMAGNETIC COMPATIBILITY REGULATIONS A GUIDE FOR MANUFACTURERS AND IMPORTERS Electromagnetic Compatibility EMC Requirements of EMC Regulations The Essential Protection Requirements The Routes to Compliance or the "Attestation Process" Meeting the Essential Protection Requirements EUROPEAN DIRECTIVES ON EMC

Searching and Sorting Algorithms-Supplementary Lecture Notes Written by Amy Csizmar Dalal

Introduction Algorithm performance measurement Search algorithms Binary search Sorting algorithms Bubble sort Quicksort Merge sort

Lecture Notes for Data Structures and Algorithms - Revised each year by John Bullinaria

1 Introduction 5 1.1 Algorithms as opposed to programs . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 Fundamental questions about algorithms . . . . . . . . . . . . . . . . . . . . . . 6 1.3 Data structures, abstract data types, design patterns . . . . . . . . . . . . . . . 7 1.4 Textbooks and web-resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.5 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2 Arrays, Iteration, Invaria...


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