Design And Fabrication Of A Simple Digital To Analog Decoder For Analog Tv Reception

Abstract

Digital signal transmission with its high level of immunity to signal impairments has found a wide application in communication. With the much benefits to the government and consumers, digital migration came forcefully by June 2015 inspired by analogue regime limitations. However, the shift came with its challenges with high rate of unemployment, high cost of living and inflation levels in Kenya. Most people are struggling to acquire the costly compliant digital TV sets or buying the set top boxes for signal conversion. Maintenance of the digital transmission standards is also costly due to subscriptions. In this research a prototype of a digital to analogue decoder based on frequency shift keying (FSK) modulation scheme and digital to analogue conversion (DAC) technologies has been designed, fabricated and tested for signal reception. It consists of FSK modulation and demodulation using CD4046 phase locked loop (PLL), 74ls164 as a multiplexer, DAC0808 converter, a receiver and a DC power supply. The demodulator was set at a free running frequency of 6 KHz with a lock range of 9.6 KHz and a capture range of 3.6 KHz. The multiplexing unit implemented using a one input eight output serial in parallel out (SIPO) shift register operated at a frequency of 63.7 Hz for data synchronization. The converter gave a linear, monotonic analogue output with a maximum voltage of 4.55 V and an offset of 0.2 V. The output had integral non linearity (INL) and differential non linearity (DNL) of 0.023 V and 0.039 V respectively. A FSK modulation unit was designed to provide the testing FSK signal currently lacking in free to air transmissions. It generated a signal at two frequencies of 4 KHz and 8 KHz from a modulating signal at a frequency range of 85-100 Hz for testing the circuit. The units were powered using a DC source designed to give stable voltages of ± 5 V, ±12 V and ±15 V within the range of ± 5%.