contains a summary class lesson on differential calculus
P0 (Port 0, Address 80h, Bit-Addressable) SP (Stack Pointer, Address 81h) DPL/DPH (Data Pointer Low/High, Addresses 82h/83h) PCON (Power Control, Addresses 87h) TCON (Timer Control, Addresses 88h, Bit-Addressable) T2CON TMOD (Timer Mode, Addresses 89h) TL0/TH0 (Timer 0 Low/High, Addresses 8Ah/8Ch) TL1/TH1 (Timer 1 Low/High, Addresses 8Bh/8Dh) P1 (Port 1, Address 90h, Bit-Addressable) SCON (Serial Control, Addresses 98h, Bit-Addressable) SBUF (Serial Control, Addresses 99h) P2 (Port 2, Address...
Functional and nonfunctional requirements User requirements System requirements Interface specification The software requirements document
SDLC Model Waterfall Model V-Shaped Model Prototyping Rapid Application Development Spiral Model Conclusion
Software engineering design, Carlos Otero, Chapter 1 (Software Design Fundamentals) GENERAL DESIGN PRINCIPLES 1. Modularization 2. Abstraction 3. Encapsulation 4. Coupling 5. Cohesion 6. Separation of interface and implementation 7. Sufficiency 8. Completeness
• Introduction to Computer Architecture • Design and Performance issues of computers • Design alternative for arithmetic functions • CPU internal architecture, I/O interface and memory • Instruction set, Instruction cycle • I/O interrupt, Direct Memory Access • Bus and Memory Hierarchy • CAD tools for schematic capture and simulations
I: CPU Internal Architecture Introduction Place of CPU in Computer Organization Functional elements of the CPU ALU Registers Internal & External data paths Control unit CPU ARCHITECTURE II: I/O Interface & Memory Problems in interfacing I/O devices with the CPU I/O Module Generic Model of I/O Module Peripherals Block diagram of a peripheral Interface with the I/O module Functions of the I/O Module Steps Involved in I/O, CPU and I/O module Interface
Programmed I/O Interrupt driven I/O Direct Memory Access (DMA)
Introduction Open Loop and Closed Loop, Principles of Feedback, Transfer Function Block Diagrams and Signal Flow Graphs Time Domain Analysis: Transient and Steady State Response Stability: RH-Criterion, Root Locus Technique Frequency Response Analysis: Bode Plot, Polar Plot, Nyquist Plot, M and N Circles, Nichol's Chart Compensators and Controllers: Lead, Lag and PID State Variable Analysis: STM, Controllability& Observability
The Inverter The AND Gate The OR Gate The NAND Gate The NOR Gate The XOR Gate The XNOR Gate Fixed Function Logic Programmable Logic
Decimal Numbers Binary Numbers Binary Conversions Binary Addition Binary Subtraction 1’s Complement 2’s Complement Signed Binary Numbers Floating Point Numbers Arithmetic Operations with Signed Numbers Hexadecimal Numbers Octal Numbers Binary Coded Decimal (BCD) Gray code ASCII Parity Method Cyclic Redundancy Check
Analog Quantities Analog and Digital Systems Binary Digits and Logic Levels Digital Waveforms Pulse Definitions Periodic Pulse Waveforms Timing Diagrams Serial and Parallel Data Basic Logic Functions Basic System Functions Integrated Circuits Test and Measurement Instruments Programmable Logic
Elements of a Block Diagram Block Diagram reduction/simpification techniques Comparison of Block Diagrams to Signal Flow Graphs Conversion of Common Block Diagrams Into Signal flow Graphs What is Signal Flow Graph (SFG)? Definition of terms required in SFG Mason’s rule
Gamma and Beta Functions Orthogonal Polynomials and Functions Sturm-Liouville Problems Fourier Series and Integrals Fourier Transformation P.D.E -> General and Particular Solutions Linear Equations with Constant Coefficients 1st and 2nd Order Equations Solutions of Heat, Wave, and Laplace Equations by Method of Separation of Variable Solutions of Heat, Wave, and Laplace Equations by Method of Fourier Transformation
VACUUMING PROCESSES CHARGING PROCEDURE TROUBLESHOOTING REFRIGERATOR TROUBLESHOOTING AIR-CONDITIONER